Performance characteristics of digital peak current-injected control DC-DC converter using FPGA

The purpose of this paper is to estimate the performance characteristics of prototype of proposed digital peak current-injected control circuit using the FPGA IC. In the proposed novel digital control circuit, the peak current-injected control is realized using the combination of the simple dual A-D signal converter and the programmed delay circuit. The simple dual A-D signal converter consists of comparator and RC integrator. The programmed delay circuit and Pulse Width Modulation (PWM) is realized in a Field Programmable Gate Array (FPGA). From experimental and simulated results, it is confirmed that 1.2ns is not enough for the resolution of time delay because the output voltage e_o and reactor current I_L are unstable. So, it is necessary to improve the resolution of time delay until less than one-tenth in the general commercial FPGA.