Doppler shift correcting in high rate digital receiver

When the software radio system work under the high dynamic traffic environment, The influence factors to the signal reception and the demodulation which must be considered is the Doppler shift when data receiving. But in the high speed digital receiver Doppler frequency shift correction carries on generally in the signal preprocessing, the algorithm is realized by the FPGA chip. This article made the research about the correction of the Doppler frequency dealing with high speed digital receiver in the process of demodulation. In the paper the Doppler shift correcting method is discussed and the project design is given, the chip programming has been described. The valuable achievements include the contribution to Doppler shift correction in variety of condition. Such as under the low axle satellite communication, the aircraft-borne traffic and missile-mounted environments and so on.