Design optimization of lateral DMOS using Genetic Algorithm

A method for the design optimization of Lateral DMOS using a Genetic Algorithm is described. Four variables are chosen, and process and device simulations are performed to optimize the tradeoffs between three device properties, the on-resistance, static breakdown voltage, and the on-state breakdown voltage. A novel method of fitness function calculation is proposed, where the target values are set for each device property, and the functions are fixed to limited values if each device property exceeds the target. It can be clearly seen that, each variable converges at a certain point in a later generation. This means that the structure of the device can be successfully optimized using the proposed method.