DocumentCode
539436
Title
High voltage gate oxide integrity for embedded Flash memory devices
Author
Huang, Catherine Yan ; Moey, Mervyn Chin Boon ; Kuan, Marcus Hing Poh ; Dormans, Do ; Mukho, Madhusudan
Author_Institution
System on Silicon Manufacturing Company Pte. Ltd, 70 Pasir Ris Industrial Drive 1, Singapore 519527
fYear
2008
fDate
27-29 Oct. 2008
Firstpage
390
Lastpage
393
Abstract
Gate oxide integrity (GOI) improvement for STI intensive structures of thick gate oxide is always a challenge when a high voltage devices process is integrated into an advanced Logic process with embedded stacked gate Flash memory. The improvement methods include STI top corner rounding (TCR) optimization by “passivation-dominant” dry etching etc was explored and reported here.
Keywords
Charge pumps; Etching; Flash memory; Hafnium; Logic gates; Optimization; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing (ISSM), 2008 International Symposium on
Conference_Location
Tokyo, Japan
ISSN
1523-553X
Electronic_ISBN
1523-553X
Type
conf
Filename
5714958
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