Fixed-Point Acceleration of Square Root and Logarithm Using Quadratic Regression for HTK Kernel Modules

This paper proposes a low-computation algorithm for logarithm and square-root in fixed-point domain. The algorithm only needs 3 ~ 6 coefficients to do inner-product of vectors which have three elements. Each computation only needs three fixed-point multiplications and two fixed-point additions to accomplish logarithm and square-root operations. According to the experimental results, the relative error is less than 0.075% and 0.6% for square-root and logarithm operation, respectively. Comparing with the CORDIC algorithm, the proposed algorithm can provide the same precision and save 4 ~ 7 times additions, 33 ~ 40% lookup table operations, and 33% ~ 40% memory requirements, that indicates that the proposed algorithm is more efficient and appropriate for IC design.