DocumentCode
539535
Title
A New Design of Embedded Processor for Image Coding
Author
Benjie, Wei ; Xiaokun, Zhang ; Li Shan ; Xuejian, Teng
Author_Institution
Center for Space Sci. & Appl. Res., Chinese Acad. of Sci., Beijing, China
Volume
1
fYear
2011
fDate
6-7 Jan. 2011
Firstpage
142
Lastpage
146
Abstract
Based on the design of MIPS[1], an novel 32-bit CPU is proposed, whose structure is simple and efficient for image processing. The specially designed CPU can be embedded into video encoder or other multimedia processor, and work well, it can also be used to do DWT (digital wavelet transform) with only few instructions. Furthermore, we take good advantage of the same hardware model to implement more complicated multimedia algorithms at a high speed. Compared with the fixed ASIC mode of image coding, the reconfigurable CPU circuit adopted in this paper is more flexible and has low cost. The experimental results prove the validity and practicability of our design.
Keywords
embedded systems; image coding; reconfigurable architectures; embedded processor; image coding; image processing; reconfigurable CPU circuit; Algorithm design and analysis; Discrete wavelet transforms; Field programmable gate arrays; Hardware; Registers; CPU; DWT; Hardwaremodel; Imageprocessing; Reconfigurable;
fLanguage
English
Publisher
ieee
Conference_Titel
Measuring Technology and Mechatronics Automation (ICMTMA), 2011 Third International Conference on
Conference_Location
Shangshai
Print_ISBN
978-1-4244-9010-3
Type
conf
DOI
10.1109/ICMTMA.2011.41
Filename
5720742
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