A low power 10 GHz voltage-controlled oscillator with modified current-reused configuration

A 10 GHz low power voltage-controlled oscillator (VCO) is implemented in TSMC 0.18 μm 1P6M CMOS process. The designed circuit topology constructed in a modified conventional current reused configuration. It is adopt two dc level shifters and using negative resistance enhancement technique. At the supply voltage 1.6 v, the measured output phase noise is -106.9 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 10.19 GHz. The core power consumption is 2.88 mW, and tuning range of frequency is about 600 MHz, from 9.5 to 10.1 GHz. The chip area is 0.540 × 0.717 (mm²).