DocumentCode
54169
Title
Characterization of Multilayer Metal Gate Fuse in 28-nm CMOS Logic Technology
Author
Min-Che Hsieh ; Yu-Cheng Lin ; Yung-Wen Chin ; Tzong-Sheng Chang ; Ya-Chin King ; Chrong-Jung Lin
Author_Institution
Microelectron. Lab., Nat. Tsing-Hua Univ., Hsinchu, Taiwan
Volume
34
Issue
9
fYear
2013
fDate
Sept. 2013
Firstpage
1088
Lastpage
1090
Abstract
In this letter, the characteristics of metal gate (MG) fuses in 28-nm complementary metal-oxide-semiconductor (CMOS) technology are investigated. Through analyzing its initial and after program characteristics, the fuse burning process is studied. The stacked layer MG fuses exhibit two stages in the burning process. These unique programming characteristics of the MG electronic fuse provide insights for the future development low power and high reliable electrically programmable fuses by advanced nanoscale CMOS technologies.
Keywords
CMOS logic circuits; CMOS logic technology; MG electronic fuse; complementary metal-oxide-semiconductor; fuse burning process; multilayer metal gate fuse; nanoscale CMOS technology; size 28 nm; CMOS integrated circuits; CMOS technology; Fuses; Logic gates; Metals; Programming; Resistance; Complementary metal–oxide–semiconductor (CMOS); fuse; metal gate (MG);
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2013.2272475
Filename
6566025
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