DocumentCode :
543952
Title :
Energy efficient co-scheduling in dynamically reconfigurable systems
Author :
Hsiung, Pao-Ann ; Lu, Pin-Hsien ; Liu, Chih-Wen
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nat. Chung Cheng Univ., Chiayi, Taiwan
fYear :
2007
fDate :
Sept. 30 2007-Oct. 3 2007
Firstpage :
87
Lastpage :
92
Abstract :
Energy consumption is a major issue in dynamically reconfigurable systems because of the high power requirements during repeated configurations. Hardware designs employ low power techniques such as configuration prefetch and reuse. Software designs restrain energy usage by dynamically scaling the voltage of processors. However, when these techniques are implemented in a system, they might be conflicting and thus cancel their mutual benefits, which results in high power consumption and low performance. We propose run-time co-scheduling of hardware and software tasks by using the slack time, which is introduced due to reusing hardware task configurations, for dynamically scaling the processor voltage such that preceding software tasks consume lesser power. At the same time, the reuse of hardware task configurations also result in lower power consumption and higher performance due to fewer number of reconfigurations. The combined effects of hardware configuration reuse and software dynamic voltage scaling result in schedules with a lower power consumption and higher performance than that obtained through individual techniques applied to hardware and software separately. We performed extensive experiments whose results show that irrespective of different slack ratios, number of voltage levels, or hardware partitions, the schedules generated by our proposed method are more energy efficient than methods that either do not apply any runtime techniques or only apply hardware configuration prefetch and reuse.
Keywords :
hardware-software codesign; low-power electronics; power aware computing; reconfigurable architectures; scheduling; task analysis; dynamically reconfigurable system; energy consumption; energy efficient coscheduling; hardware configuration reuse; hardware design; hardware task configuration; low power technique; run time coscheduling; software design; software dynamic voltage scaling; software task; Dynamic scheduling; Hardware; Prefetching; Processor scheduling; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2007 5th IEEE/ACM/IFIP International Conference on
Conference_Location :
Salzburg
Print_ISBN :
978-1-5959-3824-4
Type :
conf
Filename :
5753865
Link To Document :
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