Design and analysis of a high-performance sense amplifier for phase-change memory

This paper presents a high-performance sense amplifier and its operation method for phase change memory (PCM). The proposed structure includes pre-charge circuit, judgment circuit, bias circuit and discharge circuit. Correspondingly, the read process includes four steps of pre-charging, relaxing, sensing and discharging. Simulation results show that the proposed sense amplifier can read out the cell status efficiently in 180 ns both at low resistance (10K ohm) and high resistance (100 K ohm) with the parasitic capacitance of 20 pF. It will be used in 40 nm 1 Gbit phase change memory chip.