DocumentCode
546927
Title
Exploiting memristance for low-energy neuromorphic computing hardware
Author
Rose, Garrett S. ; Pino, Robinson ; Wu, Qing
Author_Institution
Dept. of Electr. & Comput. Eng., Polytech. Inst. of New York Univ., Brooklyn, NY, USA
fYear
2011
fDate
15-18 May 2011
Firstpage
2942
Lastpage
2945
Abstract
As conventional CMOS technology approaches fundamental scaling limits novel nanotechnologies offer great promise for VLSI integration at nanometer scales. The memristor, or memory resistor, is a novel nanoelectronic device that holds great promise for continued scaling for emerging applications. Memristor behavior is very similar to that of the synapses necessary for realizing a neural network. In this research, we have considered circuits that leverage memristance in the realization of an artificial synapse that can be used to implement neuromorphic computing hardware. A novel charge sharing based neural network is described which consists of a hybrid of conventional CMOS technology and novel memristors. Simulation results are presented which demonstrate that dense CMOS-memristive neural networks can be implemented with energy consumption on the order of tens of femto-joules.
Keywords
CMOS integrated circuits; memristors; neural nets; CMOS technology; VLSI integration; energy consumption; low-energy neuromorphic computing hardware; memristor behavior; neural network; Artificial neural networks; CMOS integrated circuits; Integrated circuit modeling; Mathematical model; Memristors; Threshold voltage; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2011 IEEE International Symposium on
Conference_Location
Rio de Janeiro
ISSN
0271-4302
Print_ISBN
978-1-4244-9473-6
Electronic_ISBN
0271-4302
Type
conf
DOI
10.1109/ISCAS.2011.5938208
Filename
5938208
Link To Document