Junction temperature distribution for three-level static power converters

Author

Spataru, Lucian ; Floricau, Dan ; Ionescu, Florin

Author_Institution

Fac. of Electr. Eng., Politeh. Univ. of Bucharest, Bucharest, Romania

fYear

2011

fDate

12-14 May 2011

Firstpage

1

Lastpage

6

Abstract

Modern multilevel converters have more degrees of freedom that are used by PWM strategies to better balance the power losses of the switches. When it reaches the maximum junction temperature, the most stressed switches in the topology will determine the converters maximum output power. In this paper, the junction temperature distribution and the maximum output power are analyzed for the 3L-NPC (Neutral Point Clamped) converter, the 3L-ANPC (Active-NPC) converter, the 3L-SNPC (Stacked-NPC) and the 3L-ASNPC (Active-SNPC) converter. The calculus methodology and the thermal model of the IGBT device used for the junction temperature distribution analysis will also be presented.

Keywords

PWM power convertors; insulated gate bipolar transistors; 3L-ANPC converter; IGBT device; PWM strategies; active-NPC converter; active-SNPC converter; calculus methodology; junction temperature distribution; multilevel converters; neutral point clamped converter; stacked-NPC converter; thermal model; three-level static power converters; Insulated gate bipolar transistors; Junctions; Power generation; Switches; Temperature distribution; Topology; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Topics in Electrical Engineering (ATEE), 2011 7th International Symposium on

Conference_Location

Bucharest

ISSN

2068-7966

Print_ISBN

978-1-4577-0507-6

Type

conf

Filename

5952255