Title :
Noise properties of asymmetrically recessed InP-based HEMTs for low-noise amplifiers
Author :
Takahashi, T. ; Sato, M. ; Makiyama, K. ; Nakasha, Y. ; Hirose, T. ; Hara, N.
Author_Institution :
Fujitsu Labs. Ltd., Atsugi, Japan
Abstract :
Low-noise amplifiers (LNAs) need appropriate transistors to operate with high performance; i.e., the first-stage amplifier in the LNAs requires low-noise property, in particular, and the succeeding stages require high gain with high breakdown voltage. In this study, we proposed InP-base HEMTs with an asymmetric gate-recess structure for high-gain amplifiers with a low noise figure. A gate-drain spacing (Lrd) of around 100 nm in the gate-recess region was suitable for first-stage amplifiers. Furthermore, a large Lrd of 250 nm was suitable for obtaining high gain in the succeeding stages.
Keywords :
III-V semiconductors; high electron mobility transistors; indium compounds; low noise amplifiers; semiconductor device breakdown; semiconductor device noise; HEMT; InP; asymmetric gate-recess structure; breakdown voltage; gate-drain spacing; high-gain amplifiers; low-noise amplifiers; noise properties; Cavity resonators; Gain; HEMTs; Indium phosphide; Logic gates; MODFETs; Noise figure;
Conference_Titel :
Compound Semiconductor Week (CSW/IPRM), 2011 and 23rd International Conference on Indium Phosphide and Related Materials
Conference_Location :
Berlin
Print_ISBN :
978-1-4577-1753-6
Electronic_ISBN :
978-3-8007-3356-9