• DocumentCode
    549520
  • Title

    Fast multipole method on GPU: Tackling 3-D capacitance extraction on massively parallel SIMD platforms

  • Author

    Zhao, Xueqian ; Feng, Zhuo

  • Author_Institution
    Dept. of ECE, Michigan Technol. Univ., Houghton, MI, USA
  • fYear
    2011
  • fDate
    5-9 June 2011
  • Firstpage
    558
  • Lastpage
    563
  • Abstract
    To facilitate full chip capacitance extraction, field solvers are typically deployed for characterizing capacitance libraries for various interconnect structures and configurations. In the past decades, various algorithms for accelerating boundary element methods (BEM) have been developed to improve the efficiency of field solvers for capacitance extraction. This paper presents the first massively parallel capacitance extraction algorithm FMMGpu that accelerates the well-known fast multipole methods (FMM) on modern Graphics Processing Units (GPUs). We propose GPU-friendly data structures and SIMD parallel algorithm flows to facilitate the FMM-based 3-D capacitance extraction on GPU. Effective GPU performance modeling methods are also proposed to properly balance the workload of each critical kernel in our FMMGpu implementation, by taking advantage of the latest Fermi GPU´s concurrent kernel executions on streaming multiprocessors (SMs). Our experimental results show that FMMGpu brings 22X to 30X speedups in capacitance extractions for various test cases. We also show that even for small test cases that may not well utilize GPU´s hardware resources, the proposed cube clustering and workload balancing techniques can bring 20% to 60% extra performance improvements.
  • Keywords
    computer graphic equipment; coprocessors; multiprocessing systems; parallel algorithms; 3D parallel capacitance extraction algorithm FMMGpu; GPU; boundary element methods; cube clustering; fast multipole method; field solvers; graphics processing units; parallel SIMD algorithm platforms; streaming multiprocessors; workload balancing techniques; Capacitance; Conductors; Graphics processing unit; Indexes; Kernel; Matrix decomposition; Runtime; Capacitance extraction; GPU; parallel fast multipole method;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE
  • Conference_Location
    New York, NY
  • ISSN
    0738-100x
  • Print_ISBN
    978-1-4503-0636-2
  • Type

    conf

  • Filename
    5981855