DocumentCode
549608
Title
Leakage-aware redundancy for reliable sub-threshold memories
Author
Kim, Seokjoong ; Guthaus, Matthew
Author_Institution
Univ. of California Santa Cruz, Santa Cruz, CA, USA
fYear
2011
fDate
5-9 June 2011
Firstpage
435
Lastpage
440
Abstract
In this work, we are the first to consider the optimization of sub-threshold stand-by VDD while simultaneously considering memory yield and redundant row/column usage. We propose a fast, optimal fault-repair analysis framework that is 200-600% faster than previous works and show that leakage can be reduced 10-14% using redundancy without sacrificing yield.
Keywords
integrated circuit yield; integrated memory circuits; optimisation; redundancy; leakage-aware redundancy; memory yield; optimal fault-repair analysis; optimization; reliable sub-threshold memories; row/column usage; Arrays; Circuit faults; Maintenance engineering; Manufacturing; Random access memory; Redundancy; Sub-threshold SRAM; leakage; redundancy; yield enhancement;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE
Conference_Location
New York, NY
ISSN
0738-100x
Print_ISBN
978-1-4503-0636-2
Type
conf
Filename
5981964
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