DocumentCode
549617
Title
Distributed resonant clock grid synthesis (ROCKS)
Author
Hu, Xuchu ; Guthaus, Matthew
Author_Institution
Univ. of California Santa Cruz, Santa Cruz, CA, USA
fYear
2011
fDate
5-9 June 2011
Firstpage
516
Lastpage
521
Abstract
Clock distribution networks can consume 35-70% of total chip power in high-performance designs. Resonant clocks can potentially reduce this power by recycling the energy using on-chip inductors. We propose the first automated Resonant clOCK Synthesis (ROCKS) algorithm. Experimental results show that with 10% inductor area, clock power can be reduced by 34%. With more inductor area, up to 90% power savings is shown feasible.
Keywords
clocks; logic design; ROCKS; automated resonant clock synthesis; clock distribution networks; clock power; distributed resonant clock grid synthesis; high-performance designs; inductor area; on-chip inductors; Benchmark testing; Capacitance; Capacitors; Clocks; Inductors; Resonant frequency; System-on-a-chip; Resonant; clock grid; low power;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE
Conference_Location
New York, NY
ISSN
0738-100x
Print_ISBN
978-1-4503-0636-2
Type
conf
Filename
5981973
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