DocumentCode :
549655
Title :
Process variation-aware routing in NoC based multicores
Author :
Sharifi, Akbar ; Kandemir, Mahmut
Author_Institution :
Dept. of CSE, Pennsylvania State Univ., University Park, PA, USA
fYear :
2011
fDate :
5-9 June 2011
Firstpage :
924
Lastpage :
929
Abstract :
We propose a variation-aware source routing algorithm for a heterogeneous NoC where each router has a different operating latency, as a result of process variations. Our proposed scheme computes the best path for each communication, based on the inherent speed of the routers (dictated by process variations) and the current traffic pattern. Our results indicate that employing our proposed routing scheme reduces average packet latencies (our performance metric), in our applications, by up to 28% as compared to the deterministic and adaptive routing algorithms.
Keywords :
microprocessor chips; network-on-chip; NoC based multicores; adaptive routing algorithms; deterministic routing algorithms; network-on-chip; variation-aware source routing algorithm; Adaptive systems; Delay; Multicore processing; Routing; System recovery; System-on-a-chip; NoC; Process Variation; Routing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE
Conference_Location :
New York, NY
ISSN :
0738-100x
Print_ISBN :
978-1-4503-0636-2
Type :
conf
Filename :
5982013
Link To Document :
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