Performance study of spike visual processing on a Supercomputer: AER-based spike convolution processing on a 320-core cluster

Author

Montero-Gonzalez, R. ; Perez-Peña, F. ; Morgado-Estevez, A. ; Paz, R. ; Linares-Barranco, A. ; Rodriguez, M.A. ; Jimenez, G.

Author_Institution

Appl. Robotic Res. Lab., Univ. of Cadiz, Cadiz, Spain

fYear

2011

fDate

27-30 June 2011

Firstpage

167

Lastpage

173

Abstract

Human brain is composed by millions of parallel neurons that process the visual information in a continuous way, spike by spike, from the information received through the retina. In this processing there are no frames in the video like it occurs in digital video. One frame every 40 ms implies information loss in between two frames. Address-Event-Representation (AER) is mechanism for multiplexing in time the stream of spikes generated by a set of neurons implemented on a chip, FPGA or microprocessor. These AER visual processing systems have been simulated in software. In this paper we present a performance study of the CRS supercomputer of the University of Cadiz (UCA) for AER-based convolution processing.

Keywords

computer vision; field programmable gate arrays; multiprocessing systems; parallel machines; video signal processing; 320-core cluster; AER based spike convolution processing; AER visual processing systems; CRS supercomputer; FPGA; address event representation; microprocessor; parallel neurons; retina; spike visual processing; Convolution; Kernel; MATLAB; Neurons; Portable computers; Visualization; AER; cluster; convolution; core; supercomputer;

fLanguage

English

Publisher

ieee

Conference_Titel

Performance Evaluation of Computer & Telecommunication Systems (SPECTS), 2011 International Symposium on

Conference_Location

The Hague

Print_ISBN

978-1-4577-0139-9

Electronic_ISBN

978-1-61782-309-1

Type

conf

Filename

5984862