Title :
On-chip combined C-V/I-V transistor characterization system in 45-nm CMOS
Author :
Realov, Simeon ; Shepard, K.L.
Author_Institution :
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
Abstract :
An on-chip transistor characterization system for combined C-V/I-V characterization is presented. Capacitance measurement uses a quasi-static charged-based measurement technique with atto-Farad resolution. Random and systematic variability in device I-V and C-V characteristics is studied. The random variability in intrinsic gate capacitance is shown to exhibit Pelgrom scaling. Correlation between I-V and C-V measurements is used to identify systematic channel-length variation gradients in a device array.
Keywords :
CMOS integrated circuits; capacitance measurement; integrated circuit measurement; transistor circuits; C-V characteristics; C-V measurement; CMOS; I-V characteristics; I-V measurement; Pelgrom scaling; atto-Farad resolution; capacitance measurement; device array; intrinsic gate capacitance; on-chip combined C-V/I-V transistor characterization system; quasistatic charged-based measurement; size 45 nm; systematic channel-length variation gradient; Arrays; Capacitance; Capacitance measurement; Correlation; Frequency measurement; Logic gates; Systematics;
Conference_Titel :
VLSI Circuits (VLSIC), 2011 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-61284-175-5
