• DocumentCode
    55116
  • Title

    High-Frequency Noise Modeling of MOSFETs for Ultra Low-Voltage RF Applications

  • Author

    Chan, Lye Hock Kelvin ; Kiat Seng Yeo ; Chew, Kok Wai Johnny ; Shih Ni Ong

  • Author_Institution
    Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
  • Volume
    63
  • Issue
    1
  • fYear
    2015
  • fDate
    Jan. 2015
  • Firstpage
    141
  • Lastpage
    154
  • Abstract
    In this paper, analytical models for high-frequency drain-current noise, gate-current noise, and their cross-correlation of MOSFETs are presented with an emphasis on the weak- and moderate-inversion regions. Unified expressions offering excellent continuity and smoothness from weak- to moderate- and strong-inversion regimes were developed. It is demonstrated that the continuity and the accuracy of the calculated four noise parameters, such as minimum noise figure, normalized noise resistance, and optimum source conductance and susceptance, are significantly improved in the weak- and moderate-inversion regions by using the proposed unified noise model, which includes the junction-induced drain-current noise. A figure-of-merit is introduced to determine the optimum gate biasing point of MOSFETs, where high gain can be achieved at low driving power and low operating noise. The results obtained from the proposed model manifest good agreement with the on-wafer measurement results.
  • Keywords
    MOSFET; semiconductor device models; semiconductor device noise; MOSFET; cross-correlation; figure-of-merit; gate-current noise; high-frequency drain-current noise; high-frequency noise modeling; inversion region; junction-induced drain-current noise; low driving power; low operating noise; metal-oxide-semiconductor field-effect transistor; noise figure; normalized noise resistance; on-wafer measurement; optimum gate biasing point; optimum source conductance; susceptance; ultra low-voltage RF application; unified expression; unified noise model; Capacitance; Hafnium; Integrated circuit modeling; Logic gates; MOSFET; Noise; Semiconductor device modeling; Channel thermal noise; MOSFET; high-frequency (HF) noise; induced gate noise; moderate inversion; noise parameters; subthreshold; thermal noise; weak inversion;
  • fLanguage
    English
  • Journal_Title
    Microwave Theory and Techniques, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9480
  • Type

    jour

  • DOI
    10.1109/TMTT.2014.2371827
  • Filename
    6965644