DocumentCode
552390
Title
Vertical-Slit Field-Effect Transistor (VeSFET) - design space exploration and DC model
Author
Pfitzner, Andrzej
Author_Institution
Inst. of Microelectron. & Optoelectron., Warsaw Univ. of Technol., Warsaw, Poland
fYear
2011
fDate
16-18 June 2011
Firstpage
151
Lastpage
156
Abstract
This paper presents an in-depth discussion of the Vertical-Slit Field-Effect Transistor´s (VeSFET´s) operation. The junction-less twin gate VeSFET is the basic component of a new 3D VeSTIC technology proposed by Maly. Our numerical TCAD simulations confirm the attractive properties of VeSFETs, such as high Ion to Ioff ratio, low leakage currents, and effective current control by independently biased symmetric gates. These simulations serve as a backbone for an analytical approximation of the VeSFET characteristics, and the first, rudimentary compact DC model for circuit simulation has been developed.
Keywords
approximation theory; field effect transistors; semiconductor device models; technology CAD (electronics); 3D VeSTIC technology; analytical approximation; circuit simulation; compact DC model; design space exploration; effective current control; independently biased symmetric gates; junction-less twin gate VeSFET; leakage currents; numerical TCAD simulations; vertical-slit field-effect transistor; Integrated circuit modeling; Logic gates; Mathematical model; Numerical models; Silicon; Substrates; Threshold voltage; VeSFET; VeSTIC technology; Vertical-Slit Field-Effect Transistor; compact model; twin-gate transistor;
fLanguage
English
Publisher
ieee
Conference_Titel
Mixed Design of Integrated Circuits and Systems (MIXDES), 2011 Proceedings of the 18th International Conference
Conference_Location
Gliwice
Print_ISBN
978-1-4577-0304-1
Type
conf
Filename
6016051
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