DocumentCode :
553545
Title :
Design and analysis of a bus bar structure for a medium voltage inverter
Author :
Ando, Makoto ; Wada, Kazuyoshi ; Takao, Kazuto ; Kanai, Teruto ; Nishizawa, Shinichi ; Ohashi, H.
Author_Institution :
Dept. of Electr. Eng., Tokyo Metropolitan Univ., Tokyo, Japan
fYear :
2011
fDate :
Aug. 30 2011-Sept. 1 2011
Firstpage :
1
Lastpage :
10
Abstract :
In order to suppress overvoltage of power devices and noise voltages of inverters, it is essential to analyze the DC-side inductance of the inverter. This paper presents a design procedure of an optimum structure for a 10-kV, 400-kVA three-level inverter. Rather than using 3D-FEM software, the bus bar inductance for the medium voltage inverter is calculated based on a partial inductance method. An inductance map is useful for determining the relationship between the bus bar structure and the inductance value and for designing the low-inductance structure. In addition, the calculation results of the bus bar inductance correspond to the measurement results, confirming the validity of the proposed method.
Keywords :
busbars; finite element analysis; invertors; 3D-FEM software; bus bar inductance; inductance map; inverters noise voltages; medium voltage inverter; partial inductance method; power devices overvoltage; voltage 10 kV; Bars; Conductors; Equations; Inductance; Inverters; Mathematical model; Medium voltage; Bus bar; Design; High voltage power converters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Electronics and Applications (EPE 2011), Proceedings of the 2011-14th European Conference on
Conference_Location :
Birmingham
Print_ISBN :
978-1-61284-167-0
Electronic_ISBN :
978-90-75815-15-3
Type :
conf
Filename :
6020404
Link To Document :
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