Adaption of MOSFETs current slope by systematic adjustment of common source stray inductance and gate resistance

When switching power MOSFETs with high current ratings at low drain-source voltages the overvoltage at turn-off due to the induced voltages at the stray inductances in the commutation path has to be considered for gate drive circuit design. Increasing the gate resistance to keep the overvoltages below a specific limit for all operating points often leads to unacceptable high switching losses due to long voltage rise times and long turn-on and turn-off delay times. Therefore the influence of the common source inductance on the current slope during switching is investigated for low voltage power MOSFETs with high current ratings. In addition the gate resistance and the common source inductance are adapted simultaneously in order to minimize induced overvoltage combined with switching losses and lower turn-on and turn-off delay times at the same time.