FPGA based current estimator for pulsed power applications

This paper presents an FPGA implementation of a method intended to minimize the measurement error of the load current in pulsed current applications. The method is based on the inclusion of a sensor model in the system model so as to obtain an extended state-space model enabling to estimate the load current. The implementation of the estimator in an FPGA platform allows to incorporate this block as a stage independent of the converter control. Experimental results validate the implementation of the proposed systems.