DocumentCode
556853
Title
Reducing line edge roughness using argon ion implantation
Author
Wang, Ssu-Ting
Author_Institution
Powerchip Technology Corporation, Module Technology Division, Diffusion Technology Group
fYear
2011
fDate
5-6 Sept. 2011
Firstpage
1
Lastpage
10
Abstract
1. To further balance the improvement between two side LER and lower CD shrinkage, it could choose different pre-PR treatment or optimize Ar implant condition in 50nm PR. 2. The further investigations need to be studied if PR type changes or PR line dimension shrinks.
Keywords
argon; ion implantation; semiconductor device manufacture; surface roughness; argon ion implantation; dimension shrinks; line edge roughness; lower CD shrinkage; wavelength 50 nm; Argon; Collaboration; Curing; Implants; Joints; Manufacturing; Resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing (ISSM) and e-Manufacturing and Design Collaboration Symposium (eMDC), 2011 International Symposium on
Conference_Location
Hsinchu
ISSN
1523-553X
Print_ISBN
978-1-4577-1647-8
Type
conf
Filename
6086080
Link To Document