Title :
Simulation environment for visual prototyping of circuits and systems
Author :
Skliarova, Iouliia ; Sklyarov, Valery
Author_Institution :
DETI, Univ. of Aveiro, Aveiro, Portugal
Abstract :
The paper presents results in the following two areas: the visual graphical verification of hardware systems and the synthesis of digital circuits from modular, hierarchical, recursive, and parallel specifications. Within these areas a simulation multimedia environment has been developed and used for verification of the proposed methods that are based on new structural models. The applicability of the environment and the methods is demonstrated through examples.
Keywords :
digital simulation; electronic engineering computing; field programmable gate arrays; formal verification; multimedia computing; FPGA; circuit visual prototyping; digital circuits; hardware systems; simulation multimedia environment; visual graphical verification; Automata; Field programmable gate arrays; Hardware; Integrated circuit modeling; Monitoring; Synchronization; Visualization; FPGA; finite state machine; simulation environment; visual prototyping;
Conference_Titel :
Integrated Circuits (ISIC), 2011 13th International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-1-61284-863-1
DOI :
10.1109/ISICir.2011.6131947
