Novel approaches for low-cost Through-Silicon Vias

3D stacking of integrated circuits is an emerging packaging technology to enable a high degree of functional integration and miniaturization. Footprint reduction in 3D stacking can be achieved by use of Through Silicon Vias (TSV). Creation of TSVs with Deep Reactive Ion Etching (DRIE), laser drilling and pulse reverse plating is established technology. Current TSV technologies are considered as high cost processes due to expensive equipment and long processing times. In this paper three novel technological approaches to create TSVs are described that potentially lead to a creation of low-cost Through Silicon Vias. The technologies in development discussed here, were identified based upon cost of ownership analysis of current TSV creation processes The paper presents the first results of the different approaches.