• DocumentCode
    561032
  • Title

    Use of harsh wire bonding to evaluate various bond pad structures

  • Author

    Hunter, Stevan ; Rasmussen, Bryce ; Ruud, Troy ; Brizar, Guy ; Vanderstraeten, Daniel ; Martinez, Jose ; Salas, Cesar ; Salas, Marco ; Sheffield, Steven ; Schofield, Jason ; Wilkins, Kyle

  • Author_Institution
    ON Semicond., Pocatello, ID, USA
  • fYear
    2011
  • fDate
    12-15 Sept. 2011
  • Firstpage
    1
  • Lastpage
    8
  • Abstract
    IC bond pad structures having Al metallization and SiO2 dielectric have been traditionally designed with full plates in underlying metallization layers, connected by vias. In addition, pads having bond over active circuitry (BOAC) which are much more sensitive to pad cracks, are likely present in the same IC. Cracks in the pad dielectric weaken the bond reliability and may cause electrical leakage or shorts to circuitry under the pad. Cracks are more likely to occur during Cu wire bond due to higher bonding stress as compared to Au alloy wire bonding. Experimental data from bonding with 1mil Au or Cu wires reveals dramatic differences in pad robustness against cracking, depending upon the underlying metal structures and patterns. A “harsh” Au wire bond recipe is also developed to produce the stress effects of Cu wire bond in experiments without having to upgrade older bonding equipment for Cu wire. Cratering test after wire bond is used to evaluate pad cracking. Ball shear testing followed by a cratering test further reveals pad cracking tendencies. Design principles for increased pad robustness to cracking are developed based on the data. Reliability data verifies the effectiveness of the design principles. Proper design of interconnects beneath the pad can greatly increase pad robustness to cracking, allowing much more margin in bonding stress, enabling the option of Au or Cu wire bond on the same IC without pad cracking.
  • Keywords
    aluminium; copper; fracture; gold; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; lead bonding; silicon compounds; Al; Au; BOAC; Cu; SiO2; ball shear testing; bond over active circuitry; bond pad structures; bond reliability; bonding stress; cratering test; electrical leakage; harsh wire bonding; integrated circuit bond pad; metallization layers; pad cracks; pad dielectric; pad robustness; stress effects; Gold; Robustness; Stress; Au wire; BOAC; Cu wire; bond pad; circuit under pad; wirebond;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics and Packaging Conference (EMPC), 2011 18th European
  • Conference_Location
    Brighton
  • Print_ISBN
    978-1-4673-0694-2
  • Type

    conf

  • Filename
    6142414