DocumentCode
56312
Title
Fast responsive flash translation layer for smart devices
Author
Se Jin Kwon ; Hyung-ju Cho ; Tae-Sun Chung
Author_Institution
Dept. of Inf. & Comput. Eng., Ajou Univ., Suwon, South Korea
Volume
60
Issue
1
fYear
2014
fDate
Feb-14
Firstpage
52
Lastpage
59
Abstract
The flash translation layer design of smart devices differs from that of traditional storages, because smart devices have frequent power-offs and limited resources. These unique features of smart devices generate inconsistent response times and performance degradation. This paper proposes a new FTL algorithm called the "Fast Responsive Flash Translation Layer (FFTL)" for smart devices. FFTL avoids frequent merge operations by first executing a cleaning policy and provides a faster response time than superblocklevel associativity algorithms by balancing the associativity of each log block. Furthermore, FFTL utilizes all the sectors within each page, thereby reducing the number of write operations. According to the experimental results, it outperforms MCSplit, Superblock, and MAST in terms of the average response time and number of operations.
Keywords
flash memories; smart cards; smart phones; FFTL; MAST; MCSplit; Superblock; fast responsive flash translation layer; flash memory; smart devices; Algorithm design and analysis; Approximation algorithms; Arrays; Flash memories; Performance evaluation; Random access memory; Time factors; embedded systems; flash memory; flash translation layer; smart devices;
fLanguage
English
Journal_Title
Consumer Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0098-3063
Type
jour
DOI
10.1109/TCE.2014.6780925
Filename
6780925
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