An experimental Josephson junction shift register element

An experimental static shift register element using Josephson devices has been designed and fabricated using a one mil minimum linewidth technology. An experimental eight-bit shift register operated with all data patterns at a maximum shift rate of 160 MHz. At 200 MHz, which was the maximum frequency capability of our instrumentation, only limited data patterns could be executed correctly. This problem was found to be associated with the internal power distribution scheme adopted for the design, together with the non-ideal external pulse waveforms. The average power dissipation was only 20μ watt per bit. Computer simulations indicate that the present design with an improved powering scheme is capable of operating at a shift rate of 360 MHz.