DocumentCode
563439
Title
High density COS/MOS 1024 bit static RAM
Author
Dingwall, Andrew G F ; Strieker, R.E.
Author_Institution
Solid State Technol. Center, RCA Corp., Somerville, NJ, USA
fYear
1974
fDate
9-11 Dec. 1974
Firstpage
101
Lastpage
103
Abstract
A static 1024 × 1 self-aligned silicon gate COS/MOS Random Access Memory has been developed using `self-registry´ techniques to achieve high packing density. The techniques developed permitted a 7500 transistor COS/MOS memory circuit to be fabricated in a 0.134 × 0.168 inch2 chip, with a 13.4 mil2 cell. Such packing density is approximately 5 times that of conventional metal gate COS/MOS circuits.
Keywords
MOS memory circuits; SRAM chips; Si; high density COS-MOS static RAM; high packing density; metal gate COS-MOS circuits; self-aligned silicon gate COS-MOS random access memory; self-registry techniques; transistor COS-MOS memory circuit; word length 1024 bit; Abstracts; Cities and towns; Lead; Logic gates; Process control; Random access memory; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 1974 International
Conference_Location
Washington, DC
ISSN
0163-1918
Type
conf
DOI
10.1109/IEDM.1974.6219643
Filename
6219643
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