• DocumentCode
    563524
  • Title

    Femto-joule logic circuit with enhancement type Schottky barrier FET

  • Author

    Muta, H. ; Yamada, K. ; Okabayashi, H. ; Suzuki, S. ; Tanaka, T. ; Nagahashi, Y.

  • Author_Institution
    Central Res. Labs., Nippon Electr. Co., Ltd., Kawasaki, Japan
  • fYear
    1974
  • fDate
    9-11 Dec. 1974
  • Firstpage
    400
  • Lastpage
    403
  • Abstract
    As an approach to an advanced LSI logic, a high speed and low power femto-joule logic circuit has been developed by using enhancement type Schottky barrier gate FET (ESBT) with 31P implanted channel layer.
  • Keywords
    Schottky barriers; field effect transistors; large scale integration; logic circuits; 31P implanted channel layer; ESBT; advanced LSI logic; enhancement type Schottky barrier FET; femto-joule logic circuit; FETs; Logic gates; Neodymium; Oscillators; Reliability; Substrates; TV;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting (IEDM), 1974 International
  • Conference_Location
    Washington, DC
  • ISSN
    0163-1918
  • Type

    conf

  • DOI
    10.1109/IEDM.1974.6219789
  • Filename
    6219789
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=563524