Two-dimensional analysis of a monolithic PNP transistor

Lateral PNP transistors have been applied in integrated circuits for quite some time. Yet device performance understanding has lacked due to geometrical complexity and thus did not allow device design optimization. This paper solves the problem for a lateral PNP transistor with buried layer, substrate and isolation diffusion by means of a two-dimensional numerical simulation under steady state conditions. Under all injection levels the results pertaining to a particular example show: emitter injection and collector collection performance; the developement of a carrier storage underneath the emitter reaching the buried layer onset; the influence of the buried layer with respect to vertical substrate transistor action and the onset of lateral substrate transistor current flow.