Title :
Fast-settling gain stage using replica amplification for high performance pipeline ADCs
Author :
Kouzehkanan, M. Khaleghi ; Dadashi, Ali ; Teymouri, Masood ; Masoumi, Saeid
Author_Institution :
Islamic Azad Univ., Khameneh, Iran
Abstract :
This paper presents a new gain stage based on the Replica gain enhancement method. The proposed gain stage operates 2.35 times faster than a similar size two-stage gain stage in the same precision, power consumption, and the same load capacitor. Proposed structure has been simulated by HSPICE software using level 49 parameters (BSIM3v3) in a typical 0.18μm CMOS technology. HSPICE simulation confirms the theoretical estimated improvements.
Keywords :
CMOS integrated circuits; SPICE; analogue-digital conversion; power consumption; BSIM3v3; CMOS technology; HSPICE simulation; HSPICE software; fast-settling gain stage; load capacitor; pipeline ADC; power consumption; replica amplification; replica gain enhancement method; size 0.18 mum; Accuracy; Capacitors; Couplings; Gain; Power demand; Rails; Resistance; gain Stage; linearity; positive feedback block; replica amplification;
Conference_Titel :
Mixed Design of Integrated Circuits and Systems (MIXDES), 2012 Proceedings of the 19th International Conference
Conference_Location :
Warsaw
Print_ISBN :
978-1-4577-2092-5
