DocumentCode :
564136
Title :
Offset compensation for voltage- and current amplifiers with CMOS inverters
Author :
Machowski, Witold ; Jasielski, Jacek
Author_Institution :
Dept. of Electron., AGH Univ. of Sci. & Technol., Kraków, Poland
fYear :
2012
fDate :
24-26 May 2012
Firstpage :
382
Lastpage :
385
Abstract :
The paper presents a study of offset reduction techniques dedicated for analog building blocks based on CMOS inverters. Circuit implementations, symbolic analysis as well as SPICE simulation results including global and local variations of model parameters are presented.
Keywords :
CMOS analogue integrated circuits; amplifiers; invertors; CMOS inverters; SPICE simulation; analog building blocks; current amplifiers; offset compensation; offset reduction techniques; symbolic analysis; voltage-amplifiers; Analytical models; CMOS integrated circuits; Foundries; Integrated circuit modeling; Inverters; Mirrors; Semiconductor device measurement; Analog circuits; CMOS inverter; UMC 180nm; offset compensation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Mixed Design of Integrated Circuits and Systems (MIXDES), 2012 Proceedings of the 19th International Conference
Conference_Location :
Warsaw
Print_ISBN :
978-1-4577-2092-5
Type :
conf
Filename :
6226212
Link To Document :
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