DocumentCode :
566236
Title :
Stacked SOI pixel detector using versatile fine pitch μ-bump technology
Author :
Motoyoshi, Makoto ; Takanohashi, Junichi ; Fukushima, Takafumi ; Arai, Yasuo ; Koyanagi, Mitsumasa
Author_Institution :
Tohoku-MicroTec Co., Ltd. (T-Micro), Sendai, Japan
fYear :
2012
fDate :
Jan. 31 2012-Feb. 2 2012
Firstpage :
1
Lastpage :
4
Abstract :
This Paper presents on 3D stacking technology with 2.5μm × 2.5μm In (Indium) bump connections with adhesive injection [1]. Instead of using the simple test device, this technology has been verified using the actual circuit level test chip. And it was found that the completion of stacking process is affected by the layout pattern of stacked each tier. In order to minimize those effects, we have optimized the layout, process parameter and device structure.
Keywords :
fine-pitch technology; indium; integrated circuit layout; integrated circuit testing; position sensitive particle detectors; silicon-on-insulator; 3D stacking technology; In; Si; actual circuit level test chip; adhesive injection; bump connections; device structure; layout pattern; process parameter; stacked SOI pixel detector; versatile fine pitch μ-bump technology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
3D Systems Integration Conference (3DIC), 2011 IEEE International
Conference_Location :
Osaka
Print_ISBN :
978-1-4673-2189-1
Type :
conf
DOI :
10.1109/3DIC.2012.6262959
Filename :
6262959
Link To Document :
بازگشت