Title :
The comparative analysis of the efficiency of regular and pseudo-optimal topologies of networks-on-chip based on Netmaker
Author :
Romanov, Oleksandr ; Lysenko, Oleksandr
Author_Institution :
Dept. of Design of Electron. Digital Equip., Nat. Tech. Univ. of Ukraine, Kiev, Ukraine
Abstract :
The different approaches to the optimization of network communication subsystem on a chip are considered. The regular and pseudo-optimal topologies with 9 nodes, using System Verilog library Netmaker are modeled. It is shown, that the pseudo-optimal topologies are highly efficient for the cases of network design with the number of nodes and connecting lines not achieved, when using typical regular topologies.
Keywords :
circuit optimisation; electronic engineering computing; hardware description languages; integrated circuit design; network topology; network-on-chip; Netmaker; System Verilog library; network communication subsystem-on-chip optimization; network design; pseudooptimal topology efficiency analysis; regular topology efficiency analysis; Bandwidth; Electronic publishing; Information services; Internet; TV; network-on-chip; pseudo-optimal topology; regular topology; wormhole routing;
Conference_Titel :
Embedded Computing (MECO), 2012 Mediterranean Conference on
Conference_Location :
Bar
Print_ISBN :
978-1-4673-2366-6
