DocumentCode
568572
Title
Impact of Logic Synthesis on Soft Error Rate of Digital Integrated Circuits
Author
Limbrick, Daniel B.
fYear
2012
fDate
19-21 Aug. 2012
Firstpage
3
Lastpage
4
Abstract
Reliability-aware synthesis exploits the properties of fault masking to improve the reliability of logic circuits. My dissertation investigates how synthesis constraints can impact the effectiveness of this technique.
Keywords
circuit reliability; digital integrated circuits; logic circuits; radiation hardening (electronics); digital integrated circuits; dissertation; logic circuits; logic synthesis; reliability-aware synthesis; soft error rate; Circuit faults; Error analysis; Integrated circuit reliability; Optical fibers; SPICE; Transient analysis; combinational logic; logic synthesis; reliability-aware synthesis; soft errors;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI (ISVLSI), 2012 IEEE Computer Society Annual Symposium on
Conference_Location
Amherst, MA
ISSN
2159-3469
Print_ISBN
978-1-4673-2234-8
Type
conf
DOI
10.1109/ISVLSI.2012.67
Filename
6296437
Link To Document