DocumentCode
568789
Title
A Genetic Algorithm approach towards compiler flag selection based on compilation and execution duration
Author
Sandran, Thayalan ; Zakaria, Mohamed Nordin B ; Pal, Anindya Jyoti
Author_Institution
Comput. & Inf. Sci. Dept., Univ. Teknol. PETRONAS, Tronoh, Malaysia
Volume
1
fYear
2012
fDate
12-14 June 2012
Firstpage
270
Lastpage
274
Abstract
The evolution of microprocessor technology often leads towards the production of high performance processors and chipsets. In the same token, to harness such capabilities is an art itself. The synthesis of fast executables begins at code design phase up till the compilation process. Even though compilers are at the end position, the right flag would provide substantial performance gain. Given the large choice of flags, often the programmer opts for the simpler method which is to merely dictate the optimization level. The compiler then imposes a set of flags accordingly. There are several shortcomings to this approach. In this work, we are proposing the usage of Genetic Algorithm to determine the flags that could be used to produce code which consumes shorter compilation and execution time.
Keywords
genetic algorithms; program compilers; chipset; code design phase; compilation process; compiler flag selection; execution duration; genetic algorithm; high performance processor; microprocessor technology; optimization level; programmer; Biological cells; Evolutionary computation; Genetic algorithms; Hardware; Optimization; Sociology; Statistics; compiler flag; generation; optimization; population;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer & Information Science (ICCIS), 2012 International Conference on
Conference_Location
Kuala Lumpeu
Print_ISBN
978-1-4673-1937-9
Type
conf
DOI
10.1109/ICCISci.2012.6297252
Filename
6297252
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