Dopant-Segregation Technique for Leakage Reduction and Performance Improvement in Trigate Transistors Without Raised Source/Drain Epitaxy

Author

Fei Liu ; Zhen Zhang ; Khater, Marwan H. ; Yu Zhu ; Koswatta, Siyuranga O. ; Chang, Josephine ; Gonsalves, Jemima ; Price, William ; Engelmann, Sebastian U. ; Guillorn, Michael A.

Author_Institution

T.J. Watson Res. Center, IBM, Yorktown Heights, NY, USA

Volume

35

Issue

5

fYear

2014

fDate

May-14

Firstpage

512

Lastpage

514

Abstract

A dopant-segregation technique for junction engineering has been demonstrated on trigate transistors using a process flow that does not include raised source/drain epitaxy. It is shown that the dopant-segregation technique reduces the OFF-state leakage current and improves the ON-state performance for NFET devices when compared with control devices built using conventional junction engineering. The dopant-segregation process has no observable impact on PFET device performance.

Keywords

MOSFET; leakage currents; semiconductor junctions; NFET devices; OFF-state leakage current; ON-state performance; PFET device performance; control devices; dopant-segregation technique; junction engineering; leakage reduction; process flow; trigate transistors; Epitaxial growth; Junctions; Leakage currents; Logic gates; Performance evaluation; Silicides; Transistors; Dopant-segregation; NiPt silicide; junction engineering; leakage reduction; trigate transistors; trigate transistors.;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2014.2313084

Filename

6781018