Impact of gate oxide thickness variations on hot-carrier degradation

We analyze the impact of oxide thickness variations on hot-carrier degradation. For this purpose, we develop an analytical approximation of our hot-carrier degradation (HCD) model. As this approximation is derived from a physics-based model of HCD, it considers all the essential features of this detrimental phenomenon. Among them are the interplay between single- and multiple-carrier mechanisms of interface state creation as well as the strong localization of the damage near the drain end of the gate. Both single- and multiple-carrier processes are controlled by the carrier acceleration integral which is calculated using information on the carrier energy distribution function. In the TCAD version of the model these functions are obtained from a solution of the Boltzmann transport equation by means of the Monte-Carlo method, which is computationally very expensive. To avoid that, an analytical expression which represents the carrier acceleration integral has been proposed. This expression provides an analytical dependences of the interface state density and the linear drain current change vs. time. Moreover, it allows us to incorporate the impact of variations in device architectural parameters on the acceleration integral and, hence, on HCD. As an example, we apply this strategy to describe the effect of variations in the oxide thickness on the linear drain current degradation (ΔI_dlin) during a hot-carrier stress. We demonstrate that the oxide thickness change substantially impacts ΔI_dlin in a wide range of stress times.