DocumentCode
571890
Title
Novel electrostatic discharge (ESD) protection solution in GaAs pHEMT technology
Author
Liou, Juin J. ; Cui, Qiang
Author_Institution
Dept. of EECS, Univ. of Central Florida, Orlando, FL, USA
fYear
2012
fDate
2-6 July 2012
Firstpage
1
Lastpage
4
Abstract
This paper develops an effective electrostatic discharge (ESD) protection solution for GaAs-based integrated circuits based on a novel multi-gate pHEMT. With approximately the same layout area, the proposed ESD protection clamp can carry an ESD current three times higher than the conventional single-gate pHEMT clamp under the human body model (HBM) stress. Moreover, the new ESD clamp shows promising results when characterized under the charged device model (CDM) stress. The parasitic capacitance of the new ESD clamp is also measured to assess its suitability for high-frequency ESD applications.
Keywords
III-V semiconductors; capacitance; electrostatic discharge; gallium arsenide; power HEMT; CDM stress; ESD current; ESD protection clamp; GaAs; HBM stress; charged device model; electrostatic discharge; high-frequency ESD application; human body model; integrated circuit; layout area; multigate pHEMT; pHEMT technology; parasitic capacitance; single-gate pHEMT clamp; Clamps; Electrostatic discharges; Logic gates; PHEMTs; Schottky diodes; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Physical and Failure Analysis of Integrated Circuits (IPFA), 2012 19th IEEE International Symposium on the
Conference_Location
Singapore
ISSN
1946-1542
Print_ISBN
978-1-4673-0980-6
Type
conf
DOI
10.1109/IPFA.2012.6306333
Filename
6306333
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