Double stack passivation layer with effective lifetime for crypto-processor

In this paper, we propose a double stack layer which double stack layers by SiO₂/SiN_x passivate on the wafer. The proposed passivation layer is deposited SiN1 by PECVD on the wafer and then deposited silicon oxide (SiO₂) b RTP. Finally, form the final metal layer using silicon nitride by PECVD. Our propose passivation layer can provide effective lifetime then conventional passivation layer by SiN_x/SiO₂ double stack layer and can provide robust passivation layer through metal layer on the top of chip.