• DocumentCode
    576362
  • Title

    System level jitter characterization of high speed I/O systems

  • Author

    Oh, Dan

  • Author_Institution
    Signal & Power Integrity Group, Rambus Inc., Sunnyvale, CA, USA
  • fYear
    2012
  • fDate
    6-10 Aug. 2012
  • Firstpage
    173
  • Lastpage
    178
  • Abstract
    As I/O speed continues to increase; the contribution of device jitter to the overall timing error becomes increasingly significant in high-speed interfaces. Conventional deterministic jitter components, such as inter-symbol interference (ISI) and duty-cycle distortion (DCD), remain relatively constant in terms of bit time. Other uncorrelated jitter components, such as random jitter (RJ) and power supply noise induced jitter (PSIJ), become more critical, because they are relatively hard to reduce. To date, uncorrelated jitter has been primarily modeled at the device or component level. Little work has been done to characterize its impact at the system level. First, this paper illustrates the various system-level issues caused by uncorrelated jitter. Next, the concept of jitter amplification and cancellation, using a clock signal, is reviewed in detail. Then, we describe a statistical link-simulation methodology that can be used to analyze the system-level jitter behavior. (PSIJ is used to demonstrate the modelling of the jitter source and its propagation.) We conclude with the correlation between in-situ on-chip measurements, and the results of the simulation.
  • Keywords
    circuit noise; clocks; interference suppression; intersymbol interference; timing jitter; clock signal; deterministic jitter component; duty cycle distortion; high speed I/O system; high speed interface; input-output system; intersymbol interference; jitter amplification; jitter cancellation; jitter source; system level issues; system level jitter characterization; timing error; Analytical models; Clocks; Jitter; Noise; Sensitivity; Timing; Transmitters;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electromagnetic Compatibility (EMC), 2012 IEEE International Symposium on
  • Conference_Location
    Pittsburgh, PA
  • ISSN
    2158-110X
  • Print_ISBN
    978-1-4673-2061-0
  • Type

    conf

  • DOI
    10.1109/ISEMC.2012.6351789
  • Filename
    6351789