Title :
Extrinsic base resistance optimization in DPSA-SEG SiGe:C HBTs
Author :
Canderle, E. ; Chevalier, P. ; Montagné, A. ; Moynet, L. ; Avenier, G. ; Boulenc, P. ; Buczko, M. ; Carminati, Y. ; Rosa, J. ; Gaquière, C. ; Chantre, A.
Author_Institution :
STMicroelectron., Crolles, France
fDate :
Sept. 30 2012-Oct. 3 2012
Abstract :
The influence of an additional annealing in the base/emitter module fabrication of state-of-the-art DPSA-SEG SiGe:C HBTs is studied in this paper. The objective of this annealing is to reduce the extrinsic base resistance RBx which in previous studies appeared to limit fMAX of DPSA-SEG SiGe HBTs. TCAD simulations and on-silicon measurements are presented for two different base widths. It is shown that the fMAX increase brought by RBX reduction can be traded for a larger fT. A fT/fMAX frequencies couple reaching 320/390 GHz is demonstrated, associated to a CML ring oscillator gate delay time of 2.2 ps.
Keywords :
Ge-Si alloys; annealing; carbon; heterojunction bipolar transistors; technology CAD (electronics); CML ring oscillator gate delay time; DPSA-SEG HBT; SiGe:C; TCAD simulations; annealing; base widths; base-emitter module fabrication; extrinsic base resistance optimization; on-silicon measurements; time 2.2 ps; Annealing; Boron; Epitaxial growth; Heterojunction bipolar transistors; Junctions; Logic gates; Resistance; Annealing; Heterojunction bipolar transistors (HBT); Silicon Germanium (SiGe);
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2012 IEEE
Conference_Location :
Portland, OR
Print_ISBN :
978-1-4673-3020-6
DOI :
10.1109/BCTM.2012.6352650
