A noise parameters extraction procedure suitable for on-wafer device characterization

This paper describes a new procedure to extract the noise parameters of on-wafer devices. The procedure is based on multiple noise figure measurements of similar devices of different size and biased at constant drain current density J_ds and constant VDS. The theory in support of this novel approach is presented and validated against measurements and simulations. Key to its implementation is a scalable noise model. The model in use is the Pospieszalski noise model, based on the equivalent noise temperatures T_gs and T_ds of the gate-source and the drain-source resistance, respectively. The new procedure also outlines a path towards the experimental validation of all the noise temperatures associated with the device´s lossy elements.