Concatenated code constructions for error correction in non-volatile memories

This work investigates and compares different coding techniques for error correction in multilevel NAND flash memories. In particular, we consider strong error correction codes with an overall code rate of 0.8 and with a sector size of 1 kbyte. Two concatenated code constructions are compared to the state-of-the-art Bose-Chaudhuri-Hocquenghem (BCH) codes. First, we consider a serial concatenation of an outer BCH code and an inner LDPC or turbo code (TC). The second construction is a generalized concatenated code with outer Reed-Solomon (RS) and inner BCH codes. The presented simulation results and theoretical investigations demonstrate that the algebraic code constructions obtain a performance close or even superior to the iterative coding schemes.