• DocumentCode
    579745
  • Title

    Energy Savings via Dead Sub-Block Prediction

  • Author

    Alves, Marco A. Z. ; Khubaib, K. ; Ebrahimi, Elham ; Narasiman, V.T. ; Villavieja, Carlos ; Navaux, Philippe Olivier Alexandre ; Patt, Y.N.

  • Author_Institution
    Inf. Inst., Fed. Univ. of Rio Grande do Sul, Porto Alegre, Brazil
  • fYear
    2012
  • fDate
    24-26 Oct. 2012
  • Firstpage
    51
  • Lastpage
    58
  • Abstract
    Cache memories have traditionally been designed to exploit spatial locality by fetching entire cache lines from memory upon a miss. However, recent studies have shown that often the number of sub-blocks within a line that are actually used is low. Furthermore, those sub-blocks that are used are accessed only a few times before becoming dead (i.e., never accessed again). This results in considerable energy waste since (1) data not needed by the processor is brought into the cache, and (2) data is kept alive in the cache longer than necessary. We propose the Dead Sub-Block Predictor (DSBP) to predict which sub-blocks of a cache line will be actually used and how many times it will be used in order to bring into the cache only those sub-blocks that are necessary, and power them off after they are touched the predicted number of times. We also use DSBP to identify dead lines (i.e., all sub-blocks off) and augment the existing replacement policy by prioritizing dead lines for eviction. Our results show a 24% energy reduction for the whole cache hierarchy when averaged over the SPEC2000, SPEC2006 and NAS-NPB benchmarks.
  • Keywords
    cache storage; power aware computing; DSBP; NAS-NPB benchmark; SPEC2000 benchmark; SPEC2006 benchmark; cache hierarchy; cache line fetching; cache memories; dead cache line subblock prediction; energy reduction; energy savings; energy wastage; replacement policy; spatial locality; Benchmark testing; Energy consumption; History; Indexes; Prediction algorithms; Radiation detectors; Turning; Cache Memory; Dead Line Predictor; Dead Sub-Block Predictor; Energy Savings;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture and High Performance Computing (SBAC-PAD), 2012 IEEE 24th International Symposium on
  • Conference_Location
    New York, NY
  • ISSN
    1550-6533
  • Print_ISBN
    978-1-4673-4790-7
  • Type

    conf

  • DOI
    10.1109/SBAC-PAD.2012.30
  • Filename
    6374771