Resource-shared custom instruction generation under performance/area constraints

Adding custom instructions is an efficient mechanism for accelerating the performance of an application-specific processor. In general, however, area cost for custom instructions grows rapidly as the performance goal grows. There have been many researches targeting this issue. However, their approaches try to optimize area cost only after the custom instructions have been generated by a separate identification algorithm, thus can hardly generate optimal area-efficient custom instructions. This paper proposes a novel approach to custom instruction generation considering area cost and performance at the same time. Experiments with benchmark examples show that our approach efficiently generates optimal results under various constraints.