DocumentCode
580263
Title
Design and evaluation of a delay-based FPGA Physically Unclonable Function
Author
Mills, Aaron ; Vyas, Sudhanshu ; Patterson, Michael ; Sabotta, Christopher ; Jones, Phillip ; Zambreno, Joseph
Author_Institution
Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
fYear
2012
fDate
Sept. 30 2012-Oct. 3 2012
Firstpage
143
Lastpage
146
Abstract
A new Physically Unclonable Function (PUF) variant was developed on an FPGA, and its quality evaluated. It is conceptually similar to PUFs developed using standard SRAM cells, except it utilizes general FPGA reconfigurable fabric, which offers several advantages. Comparison between our approach and other PUF designs indicates that our design is competitive in terms of repeatability within a given instance, and uniqueness between instances. The design can also be tuned to achieve desired response characteristics which broadens the potential range of applications.
Keywords
SRAM chips; field programmable gate arrays; FPGA reconfigurable fabric; PUF; SRAM cells; delay based FPGA physically unclonable function; Delay; Fabrics; Field programmable gate arrays; Force; Random access memory; Switches; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design (ICCD), 2012 IEEE 30th International Conference on
Conference_Location
Montreal, QC
ISSN
1063-6404
Print_ISBN
978-1-4673-3051-0
Type
conf
DOI
10.1109/ICCD.2012.6378632
Filename
6378632
Link To Document